CC2520_11 Datasheet, PDF (60/133 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER

CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
15.1 FREG
FREG is 128 fast access 8-bit registers that can be reached with REGRD and REGWR instructions.
REGRD and REGWR instructions that begin in the FREG memory area can be continued into the SREG
and wrap around at 0x07F. FREG can also be accessed with MEMRD and MEMWR instructions which
require one extra byte over the SPI with respect to REGRD and REGWR.
Registers in FREG between 0x000 and 0x01F are bit wise writeable with the BCLR and BSET instructions.
The registers located in FREG are described in section 28. Note that not all 128 addresses are used.
15.2 SREG
SREG is 128 8-bit registers that are accessible with MEMRD and MEMWR instructions.
The registers located in SREG are described in section 32. Note that not all 128 addresses are used.
15.3 TX FIFO
The TX FIFO memory area is located at addresses 0x100 to 0x17F and is thus 128 bytes. Although this
memory area is intended for the TX FIFO, it is not protected in any way, so it is still accessible with for
instance the MEMWR and MEMRD instructions. Normally, only the designated instructions should be used
to manipulate the contents of the TX FIFO. The TX FIFO can only contain one frame at a time. More details
on the TX FIFO can be found in section 22.3.
15.4 RX FIFO
The RX FIFO memory area is located at addresses 0x180 to 0x1FF and is thus 128 bytes. Although this
memory area is intended for the RX FIFO, it is not protected in any way, so it is still accessible with for
instance the MEMWR and MEMRD instructions. Normally, only the designated instructions should be used
to manipulate the contents of the RX FIFO. The RX FIFO can contain more than one frame at a time.
15.5 MEM
The MEM memory area from address 0x200 to 0x37F is 384 bytes long. The two 16-byte temporary areas
CBCTEMPH and CBCTEMPL are used for CBCMAC, UCBCMAC, CCM and UCCM instructions, with high
and low priority respectively. The remaining MEM area is general purpose memory.
15.6 Frame Filtering and Source Matching Memory Map
The frame filtering and source address matching functions use a 128-byte block of CC2520 memory to store
local address information and source matching configuration and results. This memory space is described in
Table 15. Values that do not fill an entire byte/word are in the least significant part of the byte/word.
Table 15: Frame Filtering and Source Matching Memory map
Address
REGISTER / Variable
0x3F6-3FF
Temporary storage
0x3F4-0x3F5
0x3F2-0x3F3
0x3EA-0x3F1
SHORT_ADDR
PAN_ID
EXT_ADDR
Endian Description
Reserved
Memory space used for temporary storage of variables.
Local address information
LE
The short address used during destination address filtering.
LE
The PAN ID used during destination address filtering.
LE
The IEEE extended address used during destination address
filtering.
Source address matching control
60
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