CC2520_11 Datasheet, PDF (46/133 Pages) Texas Instruments – 2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER

CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
OPCODE
REGWR
MEMXWR
RXBUF
RXBUFCP
TXBUF
RANDOM
RXBUFMOV
Inputs Outputs
a[5:0]
d[7:0]
...
s[7:0]
d[7:0]
...
a[11:0] s[7:0]
d[7:0] d[7:0]
...
...
s[7:0]
d[7:0]
...
a[11:0]
s[7:0]
c[7:0]
d[7:0]
...
d[7:0] s[7:0]
...
c[7:0]
...
s[7:0]
d[7:0]
...
p
s[7:0]
a[11:0] c[7:0]
c[7:0]
Description
Same functionality as MEMWR, except the operation
can only be started from addresses below 0x40.
Possible exceptions
MEMADDR_ERROR
XOR memory. Writes the bitwise XOR of the n’t data
byte D following the instruction and the current contents
of address (A+n) to memory location (A+n).
MEMADDR_ERROR
In addition, the n’th byte of data D output from the
instruction is the unaltered data read from the memory
location (A+n).
Read the oldest byte in the RX FIFO. At the first data
transfer the oldest byte in the RX FIFO is read and
removed from the RX FIFO. This operation is repeated
for subsequent SPI transfers.
RX_UNDERFLOW
If this instruction is performed when the RX FIFO is
empty, an RX_UNDERFLOW exception is raised.
Note: Do not execute RXBUF while RXBUFMOV is in
progress. It could result in loss of data.
This instruction functions as RXBUF except it also
copies the data bytes read from the RX FIFO to the
memory location starting at address A.
RX_UNDERFLOW
The second byte transferred is the number of bytes, C,
currently in the RX FIFO.
Note: Do not execute RXBUFCP while RXBUFMOV is in
progress. It could result in loss of data.
Write to the end of TX FIFO. Data bytes transferred after TX_OVERFLOW
the opcode are appended to the end of TX FIFO.
The SPI interface will output the number of bytes, C, in
TX FIFO before the currently transferred byte has been
entered. I.e. 0x00 is returned when transferring the first
byte to TX FIFO.
If this instruction is performed when the TX FIFO is full, a
TX_OVERFLOW exception is raised.
Read randomly generated bytes D, generated from noise
in the receiver chain.
Data management instructions
Moves the C oldest bytes from the RX FIFO to the
memory location starting at address A.
The priority of the instruction is defined by P, which is
either low (if P=0) or high (if P=1).
An RXBUFMOV_TIMEOUT exception is raised if the RX
FIFO empties before the instruction is completed, as
defined by DPUCON.RXTIM. The remaining bytes to be
moved is available in status register. Note that running
RXBUFMOV on high priority with DPUCON.RXTIM=’1’
will block execution of other DPU instructions while a
frame is beeing received, which is more than 4ms for a
128 byte frame.
A DPU_DONE_L or DPU_DONE_H exception is raised
when the operation completes, depending on the priority
of the instruction. This happens regardless of whether
the operation was successful or not.
A USAGE_ERROR exception is raised if an instruction is
already active with the requested priority level (high or
low).
RXBUFMOV_TIMEOUT
OPERAND_ERROR
USAGE_ERROR
DPU_DONE_L
DPU_DONE_H
MEMADDR_ERROR
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