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CDC7005RGZT Datasheet, PDF (6/34 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHSIZER AND JITTER CLEANER
CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685L− DECEMBER 2002 − REVISED JUNE 2009
Table 2. Word 1
BIT
BIT
NAME
DESCRIPTION / FUNCTION
TYPE
POWER-UP
CONDITION
PIN
AFFECTED
0
C0
Register selection
W
1
1
C1
Register selection
W
0
2
N0
VCXO divider N bit 0
W
1
3
N1
VCXO divider N bit 1
W
1
4
N2
VCXO divider N bit 2
W
1
5
N3
VCXO divider N bit 3
W
1
6
N4
VCXO
VCXO divider N bit 4
7
N5
Divider N{ VCXO divider N bit 5
W
1
W
1
8
N6
VCXO divider N bit 6
W
1
9
N7
VCXO divider N bit 7
W
0
10
N8
VCXO divider N bit 8
W
0
11
N9
VCXO divider N bit 9
W
0
12
ND0
VCXO delay N bit 0
13
ND1
VCXO
Delay N
VCXO delay N bit 1
14
ND2
VCXO delay N bit 2
W
0
W
0
W
0
15 MUX00
MUX0 select bit 0
W
0
F1, G1
16 MUX01
MUX0 MUX0 select bit 1
W
0
F1, G1
17 MUX02
MUX0 select bit 2
W
0
F1, G1
18 MUX10
MUX1 select bit 0
W
1
H2, H3
19 MUX11
MUX1 MUX1 select bit 1
W
0
H2, H3
20 MUX12
MUX1 select bit 2
W
0
H2, H3
21 MUX20
MUX2 select bit 0
W
0
H4, H5
22 MUX21
MUX2 MUX2 select bit 1
W
1
H4, H5
23 MUX22
MUX2 select bit 2
W
0
H4, H5
24 MUX30
MUX3 select bit 0
W
1
H6, H7
25 MUX31
MUX3 MUX3 select bit 1
W
1
H6, H7
26 MUX32
MUX3 select bit 2
W
0
H6, H7
27 MUX40
MUX4 select bit 0
W
1
G8, F8
28 MUX41
29 MUX42
MUX4
MUX4 select bit 1
MUX4 select bit 2
W
1
G8, F8
W
0
G8, F8
30 CP_DIR
Determines in which direction CP should regulate, if
W
1
A4
REF_CLK is faster than VCXO_CLK, and vice versa (see
Figure 2)
31
REXT
Enable external reference resistor (1 = enabled)
W
0
C1
† The frequency applied to the Divider N must be smaller than 250 MHz. A sufficient P Divider must be selected with the MUX_SEL to maintain
this criteria.
6
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