CDC7005RGZT Datasheet, PDF (16/34 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHSIZER AND JITTER CLEANER

CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685L− DECEMBER 2002 − REVISED JUNE 2009
device characteristics over recommended operating free-air temperature range (unless otherwise
noted)(continued)
PARAMETER
TEST CONDITIONS
MIN TYP†
MAX UNIT
tPLH/tPHL
tsk(p)
tsk(o)
tr / tf
CI
Propagation delay rising/falling edge
LVPECL pulse skew
LVPECL output skew (see Note 14)
Rise and fall time
Input capacitance at VCXO_IN,
VCXO_IB
VCXO_IN to Yn
See Figure 11, Mode 1−2−4−8−8
See Figure 11, Mode 1−1−1−1−1
20% to 80% of VOD, See Figure 10
500
180
1.5
950 ps
15 ps
60 ps
30 ps
350 ps
pF
Phase Detector
fCPmax
Maximum charge pump frequency
Charge Pump
PFD pulse width delay is 0 ps
100
MHz
ICP
Charge pump sink/source current
range
VCP = 0.5 VCC, See Table 9
±0.625
±8 mA
ICP3St
Charge pump 3-state current
ICPA
ICP absolute accuracy
ICPM
Sink/source current matching
IVCPM
ICP vs VCP matching
Operational Amplifier
0.5 V < VCP < VCC − 0.5 V
VCP = 0.5 VCC
VCP = 0.5 VCC
0.5 V < VCP < VCC − 0.5 V
1
5%
10%
30 nA
20%
IS
VIO
IIB
IIO
RI
VICR
AOL
GBW
Supply current
Input offset voltage
Input bias current
Input offset current
Input resistance
Common-mode input voltage range
Open-loop voltage gain
Gain bandwidth
AVCC = 3.6 V
(| IOPA_IP | + | IOPA_IN |) / 2
| IOPA_IP − IOPA_IN |
0.5 VCC ±500 mV
See Figure 17, f = 1 kHz
See Figure 14
2
5 mA
2
mV
1
30 nA
1
10 nA
10
MΩ
0.2
VCC−0.2 V
70
dB
3
MHz
SR
Slew rate
VO
Output voltage swing
RO
Output resistance
IOS
Short-circuit output current
See Figure 14, 20% − 80% of VO
RL = 10 kΩ
RL = 2 kΩ
Sourcing
Sinking
1
V/µs
0.2
VCC−0.2
V
0.3
VCC−0.3
60
Ω
−20
mA
50
CMRR
Common-mode rejection ratio
VINPP = 500 mV and
f = 1 kHz, (see Figure 15)
80
dB
PSRR
Power supply rejection ratio
AVCC modulated with sine wave
from
3 V to 3.6 V and f = 100 Hz (see
Figure 16)
60
dB
Vn
Input noise voltage
f = 1 kHz, see Figure 14, VIN = 0 V
† _{All typical values are at VCC = 3.3 V, temperature = 25°C.}
NOTE 14: The tsk(o) specification is only valid for equal loading of all outputs.
500
nV/√Hz
16
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