CDC7005RGZT Datasheet, PDF (5/34 Pages) Texas Instruments – 3.3-V HIGH PERFORMANCE CLOCK SYNTHSIZER AND JITTER CLEANER

BIT BIT NAME
0
C0
1
C1
2
M0
3
M1
4
M2
5
M3
6
M4
7
M5
8
M6
9
M7
10
M8
11
M9
12
MD0
13
MD1
14
MD2
15
PFD0
16
PFD1
17
PFD2
18
CP0
19
CP1
20
CP2
21
CP3
22
Y03St
23
Y13St
24
Y23St
25
Y33St
26
Y43St
27
CP3St
28
OP3St
29 MUXS0
30 MUXS1
31 MUXS2
CDC7005
3.3ĆV HIGH PERFORMANCE CLOCK SYNTHESIZER AND JITTER CLEANER
SCAS685L− DECEMBER 2002 − REVISED JUNE 2009
Table 1. Word 0
Reference Divider M
Reference Delay M
PFD Pulse Width
CP Current
Output 3-State
MUXSEL
DESCRIPTION / FUNCTION
Register selection
Register selection
Reference divider M bit 0
Reference divider M bit 1
Reference divider M bit 2
Reference divider M bit 3
Reference divider M bit 4
Reference divider M bit 5
Reference divider M bit 6
Reference divider M bit 7
Reference divider M bit 8
Reference divider M bit 9
Reference delay M bit 0
Reference delay M bit 1
Reference delay M bit 2
PFD pulse width PFD bit 0
PFD pulse width PFD bit 1
PFD pulse width PFD bit 2
CP current setting bit 0
CP current setting bit 1
CP current setting bit 2
CP current setting bit 3
Y0 3-state (1 = output enabled)
Y1 3-state (1 = output enabled)
Y2 3-state (1 = output enabled)
Y3 3-state (1 = output enabled)
Y4 3-state (1 = output enabled)
CP 3-state (1 = output enabled)
OPA 3-state and disable (1 = OPA enabled)
MUXSEL select bit 0
MUXSEL select bit 1
MUXSEL select bit 2
TYPE
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
POWER-UP
CONDITION
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
0
1
1
1
1
1
1
1
0
1
1
0
PIN
AFFECTED
A4
A4
A4
A4
A4
A4
A4
F1, G1
H2, H3
H4, H5
H6, H7
G8, F8
A4
A7
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