DRV8701_15 Datasheet, PDF (5/42 Pages) Texas Instruments – DRV8701 Brushed DC Motor Full-Bridge Gate Driver

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DRV8701
SLVSCX5B – MARCH 2015 – REVISED JULY 2015
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range referenced with respect to GND (unless otherwise noted) ⁽¹⁾
MIN
MAX
Power supply voltage (VM)
–0.3
47
Power supply voltage ramp rate (VM)
0
2
Charge pump voltage (VCP, CPH)
–0.3
VM + 12
Charge pump negative switching pin (CPL)
–0.3
VM
Internal logic regulator voltage (DVDD)
–0.3
3.8
Internal analog regulator voltage (AVDD)
–0.3
5.75
Control pin voltage (PH, EN, IN1, IN2, nSLEEP, nFAULT, VREF, IDRIVE, SNSOUT)
–0.3
5.75
High-side gate pin voltage (GH1, GH2)
–0.3
VM + 12
Continuous phase node pin voltage (SH1, SH2)
–1.2
VM + 1.2
Pulsed 10 µs phase node pin voltage (SH1, SH2)
–2.0
VM + 2
Low-side gate pin voltage (GL1, GL2)
–0.3
12
Continuous shunt amplifier input pin voltage (SP, SN)
–0.5
1
Pulsed 10-µs shunt amplifier input pin voltage (SP, SN)
–1
1
Shunt amplifier output pin voltage (SO)
–0.3
5.75
Open-drain output current (nFAULT, SNSOUT)
0
10
Gate pin source current (GH1, GL1, GH2, GL2)
0
250
Gate pin sink current (GH1, GL1, GH2, GL2)
0
500
Shunt amplifier output pin current (SO)
0
5
Operating junction temperature, T_J
Storage temperature, T_stg
–40
150
–65
150
UNIT
V
V/µs
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
V_(ESD)
Human body model (HBM) ESD stress voltage⁽¹⁾
Electrostatic discharge _{Charged device model (CDM) ESD stress voltage(2)}
VALUE
±2000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VM
VCC
VREF
ƒ_PWM
I_AVDD
I_DVDD
I_SO
T_A
Power supply voltage range
Logic level input voltage
Reference RMS voltage range (VREF)
Applied PWM signal (PH/EN or IN1/IN2)
AVDD external load current
DVDD external load current
Shunt amplifier output current loading (SO)
Operating ambient temperature
(1) Operational at VREF = 0 to 0.3 V, but accuracy is degraded
(2) Power dissipation and thermal limits must be observed
MIN
5.9
0
0.3 ⁽¹⁾
–40
MAX
45
5.5
AVDD
100
30 ⁽²⁾
30 ⁽²⁾
5
125
UNIT
V
V
V
kHz
mA
mA
mA
°C
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