DRV8701_15 Datasheet, PDF (31/42 Pages) Texas Instruments – DRV8701 Brushed DC Motor Full-Bridge Gate Driver

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DRV8701
SLVSCX5B – MARCH 2015 – REVISED JULY 2015
8.2.2 Alternate Application
In this example, the DRV8701 is powered from a supply that is boosted above VBAT. This allows the system to
work at lower VBAT voltages, but requires the user to disable OCP monitoring.
VBAT
+
10 µF
Boost
0.1 µF
0.1 µF 1 µF
R1
R2
0.01 µF
+
C1
7
24
AVDD
GH2
8
23
1 µF
DVDD
SH2
10 kŸ
9
22
1 µF
10 kŸ
nFAULT
10
SNSOUT
GND
(PPAD)
GL2
21
SP
50 mŸ
AVDD
11
SO
20
SN
BDC
12
19
68 kŸ
IDRIVE
GL1
Figure 40. DRV8701 on Boosted Supply
VBAT
8.2.2.1 Design Requirements
Table 11 gives design input parameters for system design.
Design Parameter
Battery voltage
DRV8701 supply voltage
FET total gate charge
FET gate-to-drain charge
Motor current chopping level
8.2.3 Detailed Design Procedure
Table 11. Design Parameters
Reference
VBAT
VM
Q_G
Q_GD
I_CHOP
Example Value
12 V nominal
Minimum operation: 4.0 V
VM = 7 V when VBAT < 7 V
VM = VBAT when VBAT ≥ 7 V
42 nC
11 nC
3A
8.2.3.1 IDRIVE Configuration
Because the VM supply to the DRV8701 is different from the external H-bridge supply VBAT, the designer must
disable the overcurrent monitor to prevent false overcurrent detection. The designer must place a 68-kΩ resistor
between the IDRIVE pin and AVDD.
IDRIVE is fixed at 25-mA source and 50-mA sink in this mode.
So, the rise time is 11 nC / 25 mA = 440 ns.
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