DRV8701_15 Datasheet, PDF (1/42 Pages) Texas Instruments – DRV8701 Brushed DC Motor Full-Bridge Gate Driver

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DRV8701
SLVSCX5B – MARCH 2015 – REVISED JULY 2015
DRV8701 Brushed DC Motor Full-Bridge Gate Driver
1 Features
•1 Single H-Bridge Gate Driver
– Drives Four External N-Channel MOSFETs
– Supports 100% PWM Duty Cycle
• 5.9-V to 45-V Operating Supply Voltage Range
• Two Control Interface Options
– PH/EN (DRV8701E)
– PWM (DRV8701P)
• Adjustable Gate Drive (5 Levels)
– 6-mA to 150-mA Source Current
– 12.5-mA to 300-mA Sink Current
• Supports 1.8-V, 3.3-V, and 5-V Logic Inputs
• Current Shunt Amplifier (20 V/V)
• Integrated PWM Current Regulation
– Limits Motor Inrush Current
• Low-Power Sleep Mode (9 μA)
• Two LDO Voltage Regulators to Power External
Components
– AVDD: 4.8 V, up to 30-mA Output Load
– DVDD: 3.3 V, up to 30-mA Output Load
• Small Package and Footprint
– 24-Pin VQFN (PowerPAD™)
– 4.0 × 4.0 × 0.9 mm
• Protection Features:
– VM Undervoltage Lockout (UVLO)
– Charge Pump Undervoltage (CPUV)
– Overcurrent Protection (OCP)
– Pre-Driver Fault (PDF)
– Thermal Shutdown (TSD)
– Fault Condition Output (nFAULT)
2 Applications
• Industrial Brushed-DC Motors
• Robotics
• Home Automation
• Industrial Pumps and Valves
• Power Tools
• Handheld Vacuum Cleaners
3 Description
The DRV8701 is a single H-bridge gate driver that
uses four external N-channel MOSFETs targeted to
drive a 12-V to 24-V bidirectional brushed DC motor.
A PH/EN (DRV8701E) or PWM (DRV8701P)
interface allows simple interfacing to controller
circuits. An internal sense amplifier allows for
adjustable current control. The gate driver includes
circuitry to regulate the winding current using fixed
off-time PWM current chopping.
DRV8701 drives both high- and low-side FETs with
9.5-V V_GS gate drive. The gate drive current for all
external FETs is configurable with a single external
resistor on the IDRIVE pin.
A low-power sleep mode is provided which shuts
down internal circuitry to achieve very-low quiescent
current draw. This sleep mode can be set by taking
the nSLEEP pin low.
Internal protection functions are provided:
undervoltage lockout, charge pump faults,
overcurrent shutdown, short-circuit protection,
predriver faults, and overtemperature. Fault
conditions are indicated on the nFAULT pin.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DRV8701
VQFN (24)
4.00 × 4.00 x 0.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
SPACE
Simplified System Block Diagram
5.9V to 45 V
DRV8701
PH/EN or PWM
Gate
M nSLEEP H-Bridge Gate ^drive FETs
VREF
Driver
Controller
sense output
Shunt Amp
sense
nFAULT
Protection
LDO
3.3 & 4.8 V
30 mA
1
High-side
gate drive
current
High-side
VGS
Gate-Drive Current
tDRIVE
IHOLD
IHOLD
Low-side ^IHOLD
gate drive
current
IHOLD
Low-side
VGS
IHOLD
tDRIVE
IHOLD
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.