LM3S608-IQN50-C2T Datasheet, PDF (491/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S608 Microcontroller
Table 16-2. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Type Buffer Type^a Description
PA1
18
I/O
TTL
GPIO port A bit 1.
PA2
19
I/O
TTL
GPIO port A bit 2.
PA3
20
I/O
TTL
GPIO port A bit 3.
PA4
21
I/O
TTL
GPIO port A bit 4.
PA5
22
I/O
TTL
GPIO port A bit 5.
PB0
29
I/O
TTL
GPIO port B bit 0.
PB1
30
I/O
TTL
GPIO port B bit 1.
PB2
33
I/O
TTL
GPIO port B bit 2.
PB3
34
I/O
TTL
GPIO port B bit 3.
PB4
44
I/O
TTL
GPIO port B bit 4.
PB5
43
I/O
TTL
GPIO port B bit 5.
PB6
42
I/O
TTL
GPIO port B bit 6.
PB7
41
I/O
TTL
GPIO port B bit 7.
PC0
40
I/O
TTL
GPIO port C bit 0.
PC1
39
I/O
TTL
GPIO port C bit 1.
PC2
38
I/O
TTL
GPIO port C bit 2.
PC3
37
I/O
TTL
GPIO port C bit 3.
PC4
14
I/O
TTL
GPIO port C bit 4.
PC5
13
I/O
TTL
GPIO port C bit 5.
PC6
12
I/O
TTL
GPIO port C bit 6.
PC7
11
I/O
TTL
GPIO port C bit 7.
PD0
25
I/O
TTL
GPIO port D bit 0.
PD1
26
I/O
TTL
GPIO port D bit 1.
PD2
27
I/O
TTL
GPIO port D bit 2.
PD3
28
I/O
TTL
GPIO port D bit 3.
PE0
35
I/O
TTL
GPIO port E bit 0.
PE1
36
I/O
TTL
GPIO port E bit 1.
RST
5
I
TTL
System reset input.
SSIClk
19
I/O
TTL
SSI clock.
SSIFss
20
I/O
TTL
SSI frame.
SSIRx
21
I
TTL
SSI receive.
SSITx
22
O
TTL
SSI transmit.
SWCLK
40
I
TTL
JTAG/SWD CLK.
SWDIO
39
I/O
TTL
JTAG TMS and SWDIO.
SWO
37
O
TTL
JTAG TDO and SWO.
TCK
40
I
TTL
JTAG/SWD CLK.
TDI
38
I
TTL
JTAG TDI.
TDO
37
O
TTL
JTAG TDO and SWO.
TMS
39
I/O
TTL
JTAG TMS and SWDIO.
TRST
41
I
TTL
JTAG TRST.
U0Rx
17
I
TTL
UART module 0 receive.
June 18, 2012
491
Texas Instruments-Production Data