LM3S608-IQN50-C2T Datasheet, PDF (333/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S608 Microcontroller
Table 10-4. ADC Register Map (continued)
Offset Name
Type
Reset
Description
0x08C ADCSSFSTAT2
0x0A0 ADCSSMUX3
0x0A4 ADCSSCTL3
0x0A8 ADCSSFIFO3
0x0AC ADCSSFSTAT3
0x100 ADCTMLB
RO
0x0000.0100 ADC Sample Sequence FIFO 2 Status
R/W
0x0000.0000 ADC Sample Sequence Input Multiplexer Select 3
R/W
0x0000.0002 ADC Sample Sequence Control 3
RO
-
ADC Sample Sequence Result FIFO 3
RO
0x0000.0100 ADC Sample Sequence FIFO 3 Status
R/W
0x0000.0000 ADC Test Mode Loopback
See
page
353
357
358
352
353
359
10.6
Register Descriptions
The remainder of this section lists and describes the ADC registers, in numerical order by address
offset.
June 18, 2012
333
Texas Instruments-Production Data