LM3S608-IQN50-C2T Datasheet, PDF (398/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

NRND: Not recommended for new designs.
Universal Asynchronous Receivers/Transmitters (UARTs)
Register 23: UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8
The UARTPCellIDn registers are hard-coded and the fields within the registers determine the reset
values.
UART PrimeCell Identification 2 (UARTPCellID2)
UART0 base: 0x4000.C000
UART1 base: 0x4000.D000
Offset 0xFF8
Type RO, reset 0x0000.0005
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
CID2
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
Bit/Field
31:8
7:0
Name
reserved
CID2
Type
RO
RO
Reset
0x00
0x05
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UART PrimeCell ID Register[23:16]
Provides software a standard cross-peripheral identification system.
398
June 18, 2012
Texas Instruments-Production Data