LM3S608-IQN50-C2T Datasheet, PDF (477/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

NRND: Not recommended for new designs.
Stellaris^® LM3S608 Microcontroller
Important: The ASRCP bits in the ACCTLn register must be set before using the analog
comparators. The proper pad configuration for the comparator input and output pins
are described in the Comparator Operating Mode tables.
14.3.1
Table 14-2. Comparator 0 Operating Modes
ACCTL0
ASRCP
00
01
10
11
Comparator 0
VIN-
C0-
C0-
C0-
C0-
VIN+
C0+
C0+
Vref
reserved
Output
n/a
n/a
n/a
n/a
Interrupt
yes
yes
yes
yes
ADC Trigger
yes
yes
yes
yes
Internal Reference Programming
The structure of the internal reference is shown in Figure 14-3 on page 477. This is controlled by a
single configuration register (ACREFCTL). Table 14-3 on page 477 shows the programming options
to develop specific internal reference values, to compare an external voltage against a particular
voltage generated internally.
Figure 14-3. Comparator Internal Reference Structure
AVDD
8R
R
8R
R
R
•••
EN
VREF
RNG
15 14
•••
1
0
Decoder
internal
reference
Table 14-3. Internal Reference Voltage and ACREFCTL Field Values
ACREFCTL Register
EN Bit Value RNG Bit Value
EN=0
RNG=X
Output Reference Voltage Based on VREF Field Value
0 V (GND) for any value of VREF; however, it is recommended that RNG=1 and
VREF=0 for the least noisy ground reference.
June 18, 2012
477
Texas Instruments-Production Data