LM3S608-IQN50-C2T Datasheet, PDF (120/538 Pages) Texas Instruments – Stellaris LM3S608 Microcontroller

Cortex-M3 Peripherals
NRND: Not recommended for new designs.
Bit/Field
10
9
8
7
6:4
3
2
1
Name
PNDSV
reserved
MON
SVCA
reserved
USGA
reserved
BUSA
Type
R/W
RO
R/W
R/W
RO
R/W
RO
R/W
Reset
0
0
0
Description
PendSV Exception Active
Value Description
0 A PendSV exception is not active.
1 A PendSV exception is active.
This bit can be modified to change the active status of the PendSV
exception, however, see the Caution above before setting this bit.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Debug Monitor Active
Value Description
0 The Debug monitor is not active.
1 The Debug monitor is active.
0
SVC Call Active
Value Description
0 SVC call is not active.
1 SVC call is active.
This bit can be modified to change the active status of the SVC call
exception, however, see the Caution above before setting this bit.
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Usage Fault Active
Value Description
0 Usage fault is not active.
1 Usage fault is active.
This bit can be modified to change the active status of the usage fault
exception, however, see the Caution above before setting this bit.
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Bus Fault Active
Value Description
0 Bus fault is not active.
1 Bus fault is active.
This bit can be modified to change the active status of the bus fault
exception, however, see the Caution above before setting this bit.
120
June 18, 2012
Texas Instruments-Production Data