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LMG5200_15 Datasheet, PDF (4/23 Pages) Texas Instruments – GaN TECHNOLOGY PREVIEWLMG5200 80-V, GaN Half-Bridge Power Stage
LMG5200
SNOSCY4A – MARCH 2015 – REVISED MARCH 2015
6 Specifications
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6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Input voltage
VIN (2)
HB (3)
HS (3)
HI, LI(3)
VCC(2), HB to HS
HB to VCC
SW (2)
Output current Pulsed current from SW pin (10-µs duration)
Operating junction temperature, TJ
Storage temperature, Tstg
MIN
MAX
UNIT
0
90
–0.3
96
–5
90
–0.3
15
V
–0.3
6
0
90
–5
90
40
A
–40
125
°C
–40
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) with respect to PGND
(3) with respect to AGND
6.2 ESD Ratings
V(ESD)
Electrostatic
discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
VALUE
±1000
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
UNIT
V
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Input voltage range
LI or HI Input
HS, VIN, SW
Output voltage range
HB
HS, SW Slew rate
IOUT from SW pin
Junction temperature, TJ
MIN
4.75
0
-5
VHS+ 4
10
-40
NOM
5
MAX
5.25
14
80
VHS+ 5.5
50
125
UNIT
V
V
V
V
V/ns
A
°C
6.4 Thermal Information
THERMAL METRIC(1)(2)
LMG5200
QFN
UNIT
9 PINS
RθJA
RθJC(top)
RθJB
ψJT
ψJB
RθJC(bot)
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
40
12
12
°C/W
2.8
23
12
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
4
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