LMG5200_15 Datasheet, PDF (17/23 Pages) Texas Instruments – GaN TECHNOLOGY PREVIEWLMG5200 80-V, GaN Half-Bridge Power Stage

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Layout Guidelines (continued)
Legend
VIN
SW (Top Layer)
PGND
PGND (Bottom Layer)
xxx
Small Return Path
Minimizes Power Loop
Impedance
LMG5200
LMG5200
SNOSCY4A – MARCH 2015 – REVISED MARCH 2015
2 Layer PCB
VIN Capacitors
Figure 19. Two Layer Board Cross Section With Return Path
Two-layer boards are not recommended for use with LMG5200 device due to the larger power loop inductance.
However, if design considerations allow only two board layers, place the input decoupling capacitors immediately
behind the device on the back-side of the board to minimize loop inductance.
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