TL16C2752 Datasheet, PDF (18/25 Pages) Texas Instruments – 1.8-V to 5-V DUAL UART WITH 64-BYTE FIFOS

TL16C2752
SLWS188 – JUNE 2006
www.ti.com
IOW
(WR THR)
Byte 1
50%
TXA, TXB
Data
Parity
Stop
Start
50%
TXRDYA, TXRDYB
t_d20
50%
t_d21
50%
Figure 14. Transmitter Ready (TXRDY) Waveforms, FCR0 = 0 or FCR0 = 1 and FCR3 = 0 (Mode 0)
IOW
(WR THR)
Byte 16
50%
TXA, TXB
Data
Parity
Stop
Start
50%
TXRDYA, TXRDYB
t_d20
50%
t_d21
FIFO Full
50%
Figure 15. Transmitter Ready (TXRDY) Waveforms, FCR0 = 1 and FCR3 = 1 (Mode 1)
IOW
(WR MCR)
RTSA, RTSB, DTRA,
DTRB, OPA, OPB
50%
t_d22
50%
50%
t_d22
50%
CTSA, CTSB, DSRA,
DSRB, CDA, CDB
INT
(modem)
IOR
(RD MSR)
50%
t_d23
50%
t_d24
50%
50%
50%
t_d23
RI
50%
Figure 16. Modem Control Timing Waveforms
18
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