TL16C2752 Datasheet, PDF (14/25 Pages) Texas Instruments – 1.8-V to 5-V DUAL UART WITH 64-BYTE FIFOS

TL16C2752
SLWS188 – JUNE 2006
t_w1
XTAL
N
t_w2
MFA,B
(1/1)
MFA,B
(1/2)
MFA,B
(1/3)
t_d1
t_d2
t_d1
t_d2
t_w3
t_w4
MFA,B
(1/N)
(N > 3)
2 XIN Cycles
(N −2) XIN Cycles
Figure 5. Input Clock and Baud Generator Timing Waveforms
(For FN Package Only) (When AFR2:1 = 01)
CHSEL,
A2 −A0
CS
IOW
Valid Address
t_d5
t_w6
t_w6
t_h4
t_d12
Valid Address
t_d5
t_w6
t_w6
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t_h4
D7 −D0
t_su3
t_h5
Valid Data
t_su3
t_h5
Valid Data
Figure 6. Write Cycle Timing Waveforms
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