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W83977EG-AW Datasheet, PDF (83/142 Pages) Nuvotem Talema – These products are not designed for use in life support appliances
W83977EF-AW/W83977EG-AW
After Power-on reset, the value on RTSA (pin 43) is latched by HEFRAS of CR26. In Compatible PnP,
a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port
address 3F0h or 370h). Secondly, an index value (02h, 07h-FFh) must be written to the Extended
Functions Index Register (I/O port address 3F0h or 370h same as Extended Functions Enable
Register) to identify which configuration register is to be accessed. The designer can then access the
desired configuration register through the Extended Functions Data Register (I/O port address 3F1h
or 371h).
After programming of the configuration register is finished, an additional value (AAh) should be written
to EFERs to exit the Extended Function mode to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin
MR = 1). A warm reset will not affect the configuration registers.
10.1.2 Extended Functions Enable Registers (EFERs)
After a power-on reset, W83977EF/EG enters the default operating mode. Before W83977EF/EG
enters the extended function mode, a specific value must be programmed into the Extended Function
Enable Register (EFER) so that the extended function register can be accessed. The Extended
Function Enable Registers are write-only registers. On a PC/AT system, their port addresses are 3F0h
or 370h (as described in previous section).
10.1.3 Extended Function Index Registers (EFIRs), Extended Function Data
Registers(EFDRs)
After the extended function mode is entered, the Extended Function Index Register (EFIR) must be
loaded with an index value (02h, 07h-FEh) to access Configuration Register 0 (CR0), Configuration
Register 7 (CR07) to Configuration Register FE (CRFE), and so forth through the Extended Function
Data Register (EFDR). The EFIRs are write-only registers with port address 3F0h or 370h (as
described in section 8.1.1) on PC/AT systems; the EFDRs are read/write registers with port address
3F1h or 371h (as described in section 8.1.1) on PC/AT systems.
10.2 Configuration Sequence
To program W83977EF/EG configuration registers, the following configuration sequence must be
followed:
(1). Enter the extended function mode
(2). Configure the configuration registers
(3). Exit the extended function mode
10.2.1 Enter the extended function mode
To place the chip into the extended function mode, two successive wrtites of 0x87 must be applied to
Extended Function Enable Registers(EFERs, i.e. 3F0h or 370h).
Publication Release Date: Apr. 2006
-81-
Revision 1.2