W83977EG-AW Datasheet, PDF (61/142 Pages) Nuvotem Talema – These products are not designed for use in life support appliances

W83977EF-AW/W83977EG-AW
7.3 Extended Capabilities Parallel (ECP) Port
This port is software and hardware compatible with existing parallel ports, so it may be used as a
standard printer mode if ECP is not required. It provides an automatic high burst-bandwidth channel
that supports DMA for ECP in both the forward (host to peripheral) and reverse (peripheral to host)
directions.
Small FIFOs are used in both forward and reverse directions to improve the maximum bandwidth
requirement. The size of the FIFO is 16 bytes. The ECP port supports an automatic handshake for the
standard parallel port to improve compatibility mode transfer speed.
The ECP port supports run-length-encoded (RLE) decompression (required) in hardware.
Compression is accomplished by counting identical bytes and transmitting an RLE byte that indicates
how many times the next byte is to be repeated. Hardware support for compression is optional.
For more information about the ECP Protocol, refer to the Extended Capabilities Port Protocol and ISA
Interface Standard.
7.3.1 ECP Register and Mode Definitions
NAME
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
ADDRESS
I/O
ECP MODES
FUNCTION
Base+000h
R/W
000-001
Data Register
Base+000h
R/W
011
ECP FIFO (Address)
Base+001h
R
All
Status Register
Base+002h
R/W
All
Control Register
Base+400h
R/W
010
Parallel Port Data FIFO
Base+400h
R/W
011
ECP FIFO (DATA)
Base+400h
R/W
110
Test FIFO
Base+400h
R
111
Configuration Register A
Base+401h
R/W
111
Configuration Register B
Base+402h
R/W
All
Extended Control Register
Note: The base addresses are specified by CR60 and 61, which are determined by configuration register or hardware setting.
MODE
000
001
010
011
100
101
110
111
DESCRIPTION
SPP mode
PS/2 Parallel Port mode
Parallel Port Data FIFO mode
ECP Parallel Port mode
EPP mode (If this option is enabled in the CRF0 to select ECP/EPP mode)
Reserved
Test mode
Configuration mode
Note: The mode selection bits are bit 7-5 of the Extended Control Register.
Publication Release Date: Apr. 2006
-59-
Revision 1.2