W83977EG-AW Datasheet, PDF (73/142 Pages) Nuvotem Talema – These products are not designed for use in life support appliances

W83977EF-AW/W83977EG-AW
Continued.
COMMAND
ABh
ADh
AEh
C0h
C1h
C2h
D0h
D1h
D2h
D3h
D4h
E0h
FXh
Interface Test
FUNCTION
BIT
BIT DEFINITION
00
No Error Detected
01
Keyboard "Clock" line is stuck low
02
Keyboard "Clock" line is stuck high
03
Keyboard "Data" line is stuck low
04
Keyboard "Data" line is stuck high
Disable Keyboard Interface
Enable Keyboard Interface
Read Input Port(P1) and send data to the system
Continuously puts the lower four bits of Port1 into STATUS register
Continuously puts the upper four bits of Port1 into STATUS register
Send Port2 value to the system
Only set/reset GateA20 line based on the system data bit 1
Send data back to the system as if it came from Keyboard
Send data back to the system as if it came from Auxiliary Device
Output next received byte of data from system to Auxiliary Device
Reports the status of the test inputs
Pulse only RC(the reset line) low for 6μS if Command byte is even
8.5 Hardware GATEA20/Keyboard Reset Control Logic
The KBC implements a hardware control logic to speed-up GATEA20 and KBRESET. This control
logic is controlled by LD5-CRF0 as follows:
8.5.1 KB Control Register (Logic Device 5, CR-F0)
BIT
7
6
5
4
3
2
NAME KCLKS1 KCLKS0 Reserved Reserved Reserved P92EN
KCLKS1, KCLKS0
This 2 bits are for the KBC clock rate selection.
=00
=01
=10
=11
KBC clock input is 6 Mhz
KBC clock input is 8 Mhz
KBC clock input is 12 Mhz
KBC clock input is 16 Mhz
P92EN (Port 92 Enable)
A "1" on this bit enables Port 92 to control GATEA20 and KBRESET.
A "0" on this bit disables Port 92 functions.
HGA20 (Hardware GATE A20)
1
0
HGA20 HKBRST
Publication Release Date: Apr. 2006
-71-
Revision 1.2