SM59R16A2 Datasheet, PDF (58/67 Pages) SyncMOS Technologies,Inc – 8-Bit Micro-controller

SM59R16A2/SM59R08A2
8-Bit Micro-controller
64KB/32KB ISP Flash & 2KB RAM embedded
Mnemonic: KBF
7
6
KBF.7 KBF.6
5
KBF.5
4
KBF.4
3
KBF.3
2
KBF.2
1
KBF.1
Address: 95h
0
Reset
KBF.0 00h
KBF.7: EEI line 7 flag
This is set by hardware when P17 detects a programmed level.
It generates a EEI interrupt request if KBE.7 is also set. It must be cleared by software.
KBF.6: EEI line 6 flag
This is set by hardware when P16 detects a programmed level.
It generates a EEI interrupt request if KBE.6 is also set. It must be cleared by software.
KBF.5: EEI line 5 flag
This is set by hardware when P15 detects a programmed level.
It generates a EEI interrupt request if KBE.5 is also set. It must be cleared by software.
KBF.4: EEI line 4 flag
This is set by hardware when P14 detects a programmed level.
It generates a EEI interrupt request if KBE.4 is also set. It must be cleared by software.
KBF.3: EEI line 3 flag
This is set by hardware when P13 detects a programmed level.
It generates a EEI interrupt request if KBE.3 is also set. It must be cleared by software.
KBF.2: EEI line 2 flag
This is set by hardware when P12 detects a programmed level.
It generates a EEI interrupt request if KBE.2 is also set. It must be cleared by software.
KBF.1: EEI line 1 flag
This is set by hardware when P11 detects a programmed level.
It generates a EEI interrupt request if KBE.1 is also set. It must be cleared by software.
KBF.0: EEI line 0 flag
This is set by hardware when P10 detects a programmed level.
It generates a EEI interrupt request if KBE.0 is also set. It must be cleared by software.
P1.x
KBFx
KBLSx
Fig. 16-2: Block diagram of EEI input
KBEx
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M034
58
Ver.B SM59R16A2/SM59R08A2 06/2009