SM59R16A2 Datasheet, PDF (20/67 Pages) SyncMOS Technologies,Inc – 8-Bit Micro-controller

SM59R16A2/SM59R08A2
8-Bit Micro-controller
64KB/32KB ISP Flash & 2KB RAM embedded
4.3 Program Status Word
Mnemonic: PSW
7
6
5
CY
AC
F0
4
3
RS [1:0]
2
1
OV
F1
Address: D0h
0
Reset
P
00h
CY: Carry flag.
AC: Auxiliary Carry flag for BCD operations.
F0: General purpose Flag 0 available for user.
RS[1:0]: Register bank select, used to select working register bank.
RS[1:0] Bank Selected
Location
00
Bank 0
00h – 07h
01
Bank 1
08h – 0Fh
10
Bank 2
10h – 17h
11
Bank 3
18h – 1Fh
OV: Overflow flag.
F1: General purpose Flag 1 available for user.
P: Parity flag, affected by hardware to indicate odd/even number of “one” bits in the
Accumulator, i.e. even parity.
4.4 Stack Pointer
The stack pointer is a 1-byte register initialized to 07h after reset. This register is incremented
before PUSH and CALL instructions, causing the stack to start from location 08h.
Mnemonic: SP
7
6
5
4
3
SP [7:0]
Address: 81h
2
1
0 Reset
07h
SP[7:0]: The Stack Pointer stores the scratchpad RAM address where the stack begins. In other
words, it always points to the top of the stack.
4.5 Data Pointer
The data pointer (DPTR) is 2-bytes wide. The lower part is DPL, and the highest is DPH. It can be
loaded as a 2-byte register (e.g. MOV DPTR, #data16) or as two separate registers (e.g. MOV
DPL,#data8). It is generally used to access the external code or data space (e.g. MOVC A,
@A+DPTR or MOVX A, @DPTR respectively).
Mnemonic: DPL
7
6
5
4
3
DPL [7:0]
Address: 82h
2
1
0 Reset
00h
DPL[7:0]: Data pointer Low 0
Mnemonic: DPH
7
6
5
4
3
DPH [7:0]
Address: 83h
2
1
0 Reset
00h
DPH [7:0]: Data pointer High 0
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M034
20
Ver.B SM59R16A2/SM59R08A2 06/2009