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RM0029 Datasheet, PDF (1459/1740 Pages) STMicroelectronics – The primary objective of this document
RM0029
FlexRay Communication Controller (FlexRay)
Peripheral
Bridge B
FlexRay
CHI
HIF
config
PE
SEQ
SEARCH
TxA
System
Memory
System Bus
LUT
BCU
BMIF
RxA
TCU
FR_A_RX
FR_A_TX
FR_A_TX_EN
FR_B_RX
FR_B_TX
FR_B_TX_EN
FR_DBG[0]
FR_DBG[1]
FR_DBG[2]
FR_DBG[3]
Note:
Figure 827. FlexRay block diagram
The protocol engine has two transmitter units TxA and TxB and two receiver units RxA and
RxB for sending and receiving frames through the two FlexRay channels. The time control
unit (TCU) is responsible for maintaining global clock synchronization to the FlexRay
network. The overall activity of the PE is controlled by the sequencer engine (SEQ).
The CC host interface provides host access to the module’s configuration, control, and
status registers, as well as to the message buffer configuration, control, and status registers.
The message buffers themselves, which contain the frame header and payload data
received or to be transmitted, and the slot status information, are stored in the FlexRay
memory area.
The clock domain crossing unit implements signal crossing from the CHI clock domain to
the PE clock domain and vice versa, to allow for asynchronous PE and CHI clock domains.
The CC stores the frame header and payload data of frames received or of frames to be
transmitted in the FlexRay memory area. The application accesses the FlexRay memory
area to retrieve and provide the frames to be processed by the CC. In addition to the frame
header and payload data, the CC stores the synchronization frame related tables in the
FlexRay memory area for application processing.
The FlexRay memory area is located in the system memory of the MCU. The CC has
access to the FlexRay memory area via its bus master interface (BMIF). The host provides
the start address of the FlexRay memory area within the system memory by programming
the System Memory Base Address Register (FR_SYMBADR). All FlexRay memory area
related offsets are stored in offset registers. The physical address pointer into the flexray
memory area of the MCU system memory is calculated using the offset values the FlexRay
memory area base address.
The CC does not provide a memory protection scheme for the FlexRay memory area.
Doc ID 15177 Rev 8
1459/1740