RM0029 Datasheet, PDF (1288/1740 Pages) STMicroelectronics – The primary objective of this document

Deserial Serial Peripheral Interface (DSPI)
RM0029
Table 690. DSPI_SR field description (continued)
Field
Description
24–27
RXCTR
RX FIFO Counter
The RXCTR field indicates the number of entries in the RX FIFO. The RXCTR is decremented
every time the DSPI _POPR is read. The RXCTR is incremented every time data is transferred
from the shift register to the RX FIFO.
28–31
POPNXTPTR
Pop Next Pointer
The POPNXTPTR field contains a pointer to the RX FIFO entry that will be returned when the
DSPI_POPR is read. The POPNXTPTR is updated when the DSPI_POPR is read. See Section ,
Receive first-in first-out (RX FIFO) buffering mechanism for more details.
DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
The DSPI_RSER controls DMA and interrupt requests. Do not write to the DSPI_RSER
while the DSPI is in the Running state.
Figure 716. DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
Address: DSPI_BASE + 0x30
0
1
2
3
R
00
4
5
6
7
8
9 10 11
12
13
14
15
0
0
0
W
Reset 0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
16 17 18 19
20
21 22
23 24 25 26 27
28
29
30
31
R0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
W
Reset 0 0 0 0
0 0 0 0 00 0 0 0 0 0
0
Table 691. DSPI_RSER field description
Field
Description
0
TCF_RE
1–2
3
EOQFRE
Transmission Complete Request Enable
The TCF_RE bit enables TCF flag in the DSPI_SR to generate an interrupt request.
0 TCF interrupt requests are disabled
1 TCF interrupt requests are enabled
Reserved, should be cleared.
DSPI Finished Request Enable
The EOQFRE bit enables the EOQF flag in the DSPI_SR to generate an interrupt request.
0 EOQF interrupt requests are disabled
1 EOQF interrupt requests are enabled
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