SST79LF008 Datasheet, PDF (56/252 Pages) Silicon Storage Technology, Inc – Mobile Platform Controller plus 8 Mbit LPC Firmware Flash

Advance Information
• If the hardware snoops an Enable_and_Poll
sequence, it will stay in READY state and return
the status of RDY4ALPC bit on aLFRAME# line
during SYNC phase of the fourth write cycle of the
Enable_and_Poll sequence. (If the RDY4ALPC bit
in the ALPCBC register is set, the Snooper will
drive aLFRAME# low during SYNC phase, other-
wise the Snooper will not drive aLFRAME# at all.)
No interrupt to the 8051 is generated by the
Snooper in the READY state.
• If hardware snoops a Switch_and_Reset
sequence, it will proceed to SWITCHED state,
which enable aLPC flash programming mode.
The aLPC Host can issue Switch_and_Reset sequence
immediately after Enable_and_Poll to force the aLPC
mode entry, or it can poll RDY4ALPC bit to make sure that
8051 is ready to switch. The former scenario is recom-
mended when programming a blank chip, or if 8051 firm-
ware is corrupted; the latter scenario provides handshaking
with 8051 firmware for graceful entry to the aLPC mode.
In SWITCHED state (aLPC mode) 8051 is permanently
kept in rest condition and aLPC bus is connected to internal
LPC interface unit. Hardware only snoops for aLPC
Exit_and_Reset sequence, which returns Snooper back to
IDLE state. In SWITCHED state aLPC flash commands
described in Section 4.8.6 are used to access the entire
SST79LF008 flash memory.
Mobile Platform Controller
8 Mbit LPC Firmware Flash
SST79LF008
All aLPC Snooper command sequences utilize aLPC I/O
Write cycles described in Section 4.8.5. The following fig-
ure illustrates the relationship between three states of the
aLPC snooper.
Reset
(POR, BOR, External, WDT)
IDLE
~Enable_and_Poll
Enable_and_Poll
Exit_and_Reset
READY
~(Exit_and_Reset ||
Switch_and_Reset)
Switch_and_Reset
Exit_and_Reset
SWITCHED
~Exit_and_Reset
1245 aLPC-snpr.0
FIGURE 4-8: aLPC Snooper State Machine
aLPC Bus Control Register (ALPCBC)
Location
7
6
5
4
3
2
1
0
7F8BH
Read/
Write
RDY4ALPC
-
-
-
-
-
-
-
Reset
0
X
X
X
X
X
X
X
Symbol
-
X
RDY4ALPC
Function
Not implemented
Not defined
8051 is ready for entering aLPC mode. While the Snooper is in IDLE or READY
state 8051 can write to this bit. On entry into the SWITCHED state (aLPC mode)
this bit is cleared by hardware.
1: 8051 is ready for aLPC mode.
0: 8051 is not ready for aLPC mode.
©2006 Silicon Storage Technology, Inc.
56
S71320-01-000
10/06