SST79LF008 Datasheet, PDF (249/252 Pages) Silicon Storage Technology, Inc – Mobile Platform Controller plus 8 Mbit LPC Firmware Flash

Mobile Platform Controller
8 Mbit LPC Firmware Flash
SST79LF008
24.5 Analog Characteristics
Advance Information
24.5.1 ADC Characteristics
TABLE 24-24: ADC Characteristics (TA=0 to 70°C, VDD = 3.0-3.6V, AVDD = 3.15-3.45V, AVSS = VSS = 0V)
Symbol Parameter
Min
Bit
Resolution
AINT¹ Analog Input Voltage
0
DNL
Differential Non-Lin-
earity Error
INL
Integral Non-Linearity
Error
TOPOFF Offset Voltage
-8
BOTOFF¹
F_C
Maximum Conversion
Rate
1. Guaranteed by design
Typ
10
±0.8
±1.0
3
Max
AVDD
±1
Units
Bits
V
LSB
Conditions
±2
LSB
8
LSB
400 KSPS ADC clock frequency = 2.0 MHz
T24-24.1245
24.5.2 DAC Characteristics
TABLE 24-25: DAC Characteristics (TA=0 to 70°C, VDD = 3.0-3.6V, AVDD = 3.15-3.45V, AVSS = VSS = 0V,
RL >= 100k, CL <= 50pF)
Symbol Parameter
Min Typ Max Units Conditions Comments
Bit
Resolution
8
Bits
DNL
Differential Non-Lin-
earity Error
0.3
1.0
LSB
INL Integral Non-Linearity
Error
0.5
1.0
LSB
V_FS Full Scale Voltage
3.087 3.207 3.287
V
V_ZSE Zero Scale Error
40
100
mV
V_FSE
Full Scale Voltage
Error
40
100
mV
V_OMAX2 Maximum Output Volt- 3.187 3.247 3.287
V
age
AV_DD = 3.3V
AV_DD = 3.3V
V_FS = V_OMAX – VOUT(00H)¹
V_ZSE = VOUT(00H)¹
V_FSE =
V_OMAX – (AV_DD*255/256)
V_OMAX = VOUT(FFH)
V_LSB2 LSB Size
12.11 12.58 12.89 mV
Channel Crosstalk^2,3
-40
-30
dB
AV_DD = 3.3V
V_LSB =
(V_OMAX – VOUT(00H)¹)/255
20*log(V_PP max of unselected
channel / V_FS of selected chan-
nel)
T_S2,4
T_ON2,5
T_ONA2,6
Analog Output Settling
Time
Analog Output Enable
Time
1
us
3
us
100
C_L = 50pF
R_L = 100k
C_L = 50pF
R_L = 100k
T24-25.1245
1. VOUT(XXH) – actual DAC output voltage for input code XXH
2. Guaranteed by design
3. Peak-to-peak output voltage of unselected channel with input code 80H, when selected channel output voltage changes from
VOUT(00H) to VOUT(FFH)
4. Time from loading data to output voltage settling within an error of +/- 0.5LSB
5. Time from the moment when DACENn = 1 in DACCTRL register to settling of the output voltage
6. Time from the moment when DACEN = 1 in DACCTRL register to settling of the output voltage
©2006 Silicon Storage Technology, Inc.
249
S71320-01-000
10/06