MB84VD22386EJ Datasheet, PDF (7/63 Pages) SPANSION – 32M (X16) FLASH MEMORY 16M (X16) SRAM Interface FCRAM

MB84VD22386/387/388EJ-85/90/MB84VD22396/397/398EJ-85/90
s DEVICE BUS OPERATION
Operation *^1, *²
CEf CE1s CE2s
OE
WE
LBs
UBs
DQ7 to DQ0
DQ15 to DQ8
RESET
WP/ACC
*⁷
Full Standby
H H H X X X X High-Z
High-Z
H
X
Output Disable *³
H L H H H X X High-Z
High-Z
H
X
L H H H H X X High-Z
High-Z
Read from Flash *⁴
L H H LHX X
DOUT
DOUT
H
X
Write to Flash
L H H HLX X
DIN
DIN
H
X
Read from FCRAM *⁵ H L H L H X X
DOUT
DOUT
H
X
LL
DIN
DIN
Write to FCRAM
H L H H L H L High-Z
DIN
H
X
LH
DIN
High-Z
Temporary Sector
Group Unprotection *⁶
X
X
X XXX X
X
X
VID
X
Flash Hardware Reset X H H X X X X High-Z
High-Z
L
X
Boot Block Sector Write
Protection
X
X
X XXX X
X
X
X
L
FCRAM Power Down *⁸ X X L X X X X
X
X
X
X
Legend: L = VIL, H = VIH, X = VIL or VIH. See “ DC CHARACTERISTICS” for voltage levels.
*1: Other operations except for indicated this column are prohibited.
*2: Do not apply CEf = VIL, CE1s = VIL and CE2s = VIH all at once.
*3: FCRAM Output Disable condition should not be kept longer than 1 µs.
*4: WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
*5: FCRAM Byte control at Read operation is not supported.
*6: Also used for the extended sector group protections.
*7: Protect “outermost” 2 × 8 Kbytes (4 words) on both ends of the boot block sectors.
*8: Power Down mode can be entered from Standby state and all DQ pins are in High-Z state.
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