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MB84VD22386EJ Datasheet, PDF (45/63 Pages) SPANSION – 32M (X16) FLASH MEMORY 16M (X16) SRAM Interface FCRAM
MB84VD22386/387/388EJ-85/90/MB84VD22396/397/398EJ-85/90
• WRITE OPERATION (FCRAM)
Parameter
Write Cycle Time
Address Setup Time
Address Hold Time
CE1s Write Setup Time
CE1s Write Hold Time
WE Setup Time
WE Hold Time
LBs and UBs Setup Time
LBs and UBs Hold Time
OE Setup Time
OE Hold Time
OE High to CE1s Low Setup Time
OE High to Address Hold Time
CE1s Write Pulse Width
WE Write Pulse Width
CE1s Write Recovery Time
WE Write Recovery Time
Data Setup Time
Data Hold Time
CE1s High Pulse Width
Symbol
tWC
tAS
tAH
tCS
tCH
tWS
tWH
tBS
tBH
tOES
tOEH
tOEH[ABS]
tOHCL
tOHAH
tCW
tWP
tWRC
tWR
tDS
tDH
tCP
Value
Min
Max
90

0

45

0
1000
0
1000
0

0

0

−5

0
1000
45
1000
20

−3

−5

60

60

15

15
1000
20

0

20

Unit
Notes
ns
*1
ns
*2
ns
*2
ns
ns
ns
ns
ns
ns
ns
*3
ns
*3, *4
ns
*5
ns
*6
ns
*7
ns
*1, *8
ns
*1, *8
ns
*1, *9
ns
*1, *3, *9
ns
ns
ns
*9
*1: Minimum value must be equal or greater than the sum of actual tCW (or tWP) and tWRC (or tWR) .
*2: New write address is valid from either CE1s or WE that is brought to High.
*3: Maximum value is applicable if CE1s is kept at Low and both WE and OE are kept at High.
*4: The tOEH is specified from end of tWC (Min) , and is a reference value when access time is determined by tOE.
If actual value is shorter than specified minimum value, tOE becomes longer by the amount of subtracting actual
value from specified minimum value.
*5: The tOEH[ABS] is the absolute minimum value if write cycle is terminated by WE and CE1s stays Low.
*6: tOHCL (Min) must be satisfied if read operation is not performed prior to write operation.
In case OE is disabled after tOHCL (Min) , WE Low must be asserted after tRC (Min) from CE1s Low.
In other words, read operation is initiated if tOHCL (Min) is not satisfied.
*7: Applicable if CE1s stays Low after read operation.
*8: tCW and tWP are applicable if write operation is initiated by CE1s and WE, respectively.
*9: tWRC and tWR are applicable if write operation is terminated by CE1s and WE, respectively.
The tWR (Min) can be ignored if CE1s is brought to High together or after WE is brought to High.
In such a case, the tCP (Min) must be satisfied.
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