MB84VD22386EJ Datasheet, PDF (31/63 Pages) SPANSION – 32M (X16) FLASH MEMORY 16M (X16) SRAM Interface FCRAM

MB84VD22386/387/388EJ-85/90/MB84VD22396/397/398EJ-85/90
• Read Only Operations Characteristics (Flash)
Parameter
Symbol
JEDEC Standard
Conditions
Read Cycle Time
tAVAV
tRC
—
Address to Output Delay
tAVQV
tACC
CEf = VIL
OE = VIL
Chip Enable to Output Delay
tELQV
tCE
OE = VIL
Output Enable to Output Delay
tGLQV
tOE
—
Chip Enable to Output High-Z
tEHQZ
tDF
—
Output Enable to Output High-Z
tGHQZ
tDF
—
Output Hold Time From Addresses,
CEf or OE, Whichever Occurs First
tAXQX
tOH
—
RESET Pin Low to Read Mode
—
tREADY
—
Note: Test Conditions– Output Load: 1 TTL gate and 30 pF
Input rise and fall times: 5 ns
Input pulse levels: 0.0 V or VCC
Timing measurement reference level
Input: 0.5×VCC
Output: 0.5×VCC
Value
Unit
Min
Max
85
—
ns
—
85
ns
—
85
ns
—
35
ns
—
30
ns
—
30
ns
0
—
ns
—
20
µs
30