MB84VD22386EJ Datasheet, PDF (40/63 Pages) SPANSION – 32M (X16) FLASH MEMORY 16M (X16) SRAM Interface FCRAM

MB84VD22386/387/388EJ-85/90/MB84VD22396/397/398EJ-85/90
• Back-to-back Read/Write Timing Diagram (Flash)
Address
CEf
OE
WE
Read
tRC
BA1
Command
tWC
BA2
(555h)
tAS
tAH
Read
tRC
BA1
tACC
tCE
Command
tWC
BA2
(PA)
Read
tRC
Read
tRC
BA1
BA2
(PA)
tAS
tAHT
tOE
tCEPH
tGHWL
tWP
tOEH
tDS ^tDH
tDF
tDF
DQ
Valid Valid
Output Input
Valid Valid
Output Input
Valid
Output
Status
(A0h)
(PD)
Note: This is an example of Read for Bank 1 and Embedded Algorithm (program) for Bank 2.
BA1: Address of Bank 1.
BA2: Address of Bank 2.
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