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MB84VD22386EJ Datasheet, PDF (3/63 Pages) SPANSION – 32M (X16) FLASH MEMORY 16M (X16) SRAM Interface FCRAM
MB84VD22386/387/388EJ-85/90/MB84VD22396/397/398EJ-85/90
(Continued)
1. FLASH MEMORY
• Simultaneous Read/Write Operations (Dual Bank)
Multiple devices available with different bank sizes
Host system can program or erase in one bank, then immediately and simultaneously read from the other bank
Zero latency between read and write operations
Read-while-erase
Read-while-program
• Minimum 100,000 Write/Erase Cycles
• Sector Erase Architecture
Eight 4 K words and sixty three 32 K words.
Any combination of sectors can be concurrently erased. The devices also support full chip erase.
• Boot Code Sector Architecture
MB84VD22386EJ/VD22387EJ/VD22388EJ: Top sector
MB84VD22396EJ/VD22397EJ/VD22398EJ: Bottom sector
• Embedded EraseTM Algorithms
Automatically pre-programs and erases the chip or any sector
• Embedded ProgramTM Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit Feature for Detection of Program or Erase Cycle Completion
• Ready-Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic Sleep Mode
When addresses remain stable, automatically switch themselves to low power mode.
• Hidden ROM (Hi-ROM) Region
64 Kbyte of Hi-ROM, accessible through a new “Hi-ROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC Input Pin
Allows protection of boot sectors at VIL, regardless of sector protection/unprotection status
(MB84VD22386EJ/VD22387EJ/VD22388EJ: SA69,SA70
MB84VD22396EJ/VD22397EJ/VD22398EJ: SA0,SA1)
Allows removal of boot sector protection at VIH.
At VACC, program time will reduce by 40%.
• Erase Suspend/Resume
Suspends the erase operation to allow a read in another sector within the same device
• Please Refer to “MBM29DL32XTE/BE” Data Sheet in Detailed Function
2. FCRAM
• Power Dissipation
Operating: 20 mA Max
Standby: 70 µA Max
Power Down: 10 µA Max
• Power Down Control by CE2s
• Byte Write Control: LBs (DQ7-DQ0), UBs (DQ15-DQ5)
• 4 Words Address Access Capability
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