SI5345 Datasheet, PDF (58/62 Pages) Silicon Laboratories – 10-CHANNEL, ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATOR/CLOCK MULTIPLIER

Si5345/44/42
10. PCB Land Pattern
Figure 30 illustrates the PCB land pattern details for the devices. Table 22 lists the values for the dimensions
shown in the illustration.
Si5345
Si5344 and Si5342
Figure 30. PCB Land Pattern
Table 22. PCB Land Pattern Dimensions
Dimension
C1
C2
E
X1
Y1
X2
Y2
Si5345 (Max)
8.90
8.90
0.50
0.30
0.85
5.30
5.30
Si5344/42 (Max)
6.90
6.90
0.50
0.30
0.85
5.30
5.30
Notes:
General
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
3. All dimensions shown are at Maximum Material Condition (MMC). Least Material Condition is
calculated based on a fabrication Allowance of 0.05 mm.
Solder Mask Design
4. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder mask
and the metal pad is to be 60 μm minimum, all the way around the pad.
Stencil Design
5. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to
assure good solder paste release.
6. The stencil thickness should be 0.125 mm (5 mils).
7. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
8. A 3x3 array of 1.25 mm square openings on 1.80 mm pitch should be used for the center ground
pad.
Card Assembly
9. A No-Clean, Type-3 solder paste is recommended.
10. The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small
Body Components.
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