SI5345 Datasheet, PDF (53/62 Pages) Silicon Laboratories – 10-CHANNEL, ANY-FREQUENCY, ANY-OUTPUT JITTER ATTENUATOR/CLOCK MULTIPLIER

Si5345/44/42
Table 19. Si5345/44/42 Pin Descriptions (Continued)
Pin Number
Pin Name
Pin Type¹
Si5345 Si5344 Si5342
Function
Power
VDD
32
21
21
46
32
32
60
39
39
—
40
40
P
Core Supply Voltage
P
The device operates from a 1.8 V supply. A 1.0 μF bypass
capacitor should be placed very close to this pin. See the
P
Si5345/44/42 Family Reference Manual for power supply
filtering recommendations.
P
VDDA
13
8
8
—
9
9
VDDS
—
26
26
—
—
29
—
—
34
VDDO0
22
18
18
VDDO1
26
23
23
VDDO2
29
29
—
VDDO3
33
34
—
VDDO4
36
—
—
P
Core Supply Voltage 3.3 V
This core supply pin requires a 3.3 V power source. A
P
1 μF bypass capacitor should be placed very close to this
pin. See the Si5345/44/42 Family Reference Manual for
power supply filtering recommendations.
P
Status Output Voltage
P
The voltage on this pin determines VOL/VOH on the
Si5342/44 LOL_A and LOL_B outputs. Connect to either
P
3.3 V or 1.8 V. A 1.0 μF bypass capacitor should be
placed very close to this pin.
P
Output Clock Supply Voltage
P
Supply voltage (3.3 V, 2.5 V, 1.8 V) for OUTn, OUTn out-
puts. For unused outputs, leave VDDO pins unconnected.
P
An alternative option is to connect the VDDO pin to a
power supply and disable the output driver to minimize
P
current consumption.
P
VDDO5
40
—
—
P
VDDO6
43
—
—
P
VDDO7
49
—
—
P
VDDO8
52
—
—
P
VDDO9
57
—
—
P
GND PAD
—
—
—
P
Ground Pad
This pad provides connection to ground and must be con-
nected for proper operation. Use as many vias as practi-
cal and keep the via length to an internal ground plan as
short as possible.
Notes:
1. I = Input, O = Output, P = Power
2. The IO_VDD_SEL control bit (0x0943 bit 0) selects 3.3 V or 1.8 V operation.
3. The voltage on the VDDS pin(s) determines 3.3 V or 1.8 V operation.
4. Refer to the Si5345/44/42 Family Reference Manual for more information on register setting names.
Rev. 1.0
53