SI5374 Datasheet, PDF (56/69 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5374
7.1. ICAL
The device registers must be configured for the device operation. After device configuration, a calibration
procedure must be performed once a stable clock is applied to the selected CKINn input. The calibration process is
triggered by writing a “1” to bit D6 in register 136. See the Family Reference Manual for details. In addition, after a
successful calibration operation, changing any of the registers indicated in Table 9 requires that a calibration be
performed again by the same procedure (writing a “1” to bit D6 in register 136).
Table 9. ICAL-Sensitive Registers
Address
0
0
1
1
2
2
4
5
7
9
10
10
11
11
19
19
19
19
25
31
34
40
40
43
46
55
55
Register
BYPASS_REG
CKOUT_ALWAYS_ON
CK_PRIOR1
CK_PRIOR2
BSWEL_REG
RATE_REG
HIST_DEL
ICMOS
FOSREFSEL
HIST_AVG
DSBL1_REG
DSBL2_REG
PD_CK1
PD_CK2
FOS_EN
FOS_THR
LOCKT
VALTIME
N1_HS
NC1_LS
NC2_LS
N2_HS
N2_LS
N31
N32
CLKIN1RATE
CLKIN2RATE
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Rev. 1.1