SI5374 Datasheet, PDF (26/69 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5374
Register 4.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name AUTOSEL_REG [1:0]
HIST_DEL [4:0]
Type
R/W
R
R/W
Reset value = 0001 0010
Bit
Name
Function
7:6 AUTOSEL_REG [1:0] AUTOSEL_REG [1:0].
Selects input clock selection control method.
00: Manual (either register or pin controlled, see CKSEL_PIN)
01: Automatic non-revertive
10: Automatic revertive
11: Reserved
5
Reserved
4:0
HIST_DEL [4:0]
HIST_DEL [4:0].
Selects amount of delay to be used in generating the history information used
for Digital Hold.
Register 5.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
ICMOS [1:0]
Type
R/W
R
R
R
R
R
R
Reset value = 1110 1101
Bit
Name
Function
7:6 ICMOS [1:0] ICMOS [1:0].
When the output buffer is set to CMOS mode, these bits determine the output buffer drive
strength. The first number below refers to 2.5 V operation; the second to 1.8 V operation.
These values assume CKOUT+ is tied to CKOUT-.
00: 5 mA/1.75 mA
01: 10 mA/3.5 mA
10: 15 mA/5.5 mA
11: 20 mA/7.5 mA
5:0
Reserved
26
Rev. 1.1