SI5374 Datasheet, PDF (20/69 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5374
6. Register Map
The Si5374 has four identical register maps for each DSPLL. Each DSPLL has a unique I²C address enabling
independent control and device configuration. The I²C address is 11010 [A1] [A0] for the entire device. Each
corresponding DSPLL [A1] [A0] address is fixed as below.
[A1] [A0]
DSPLLA: 0 0
DSPLLB: 0 1
DSPLLC: 1 0
DSPLLD: 1 1
Note: The Si5374 register map is similar, but not identical, to the Si5324 device.
All register bits that are not defined in this map should always be written with the specific reset values. Writing to
these bits with values other than the specified reset values may result in undefined device behavior. Registers not
listed, such as Register 64, should never be written to.
Table 8. Si5374 Registers
Reg.
0
1
2
3
4
5
6
7
8
9
10
11
19
20
21
22
23
24
25
31
32
D7
D6
D5
D4
D3
D2
D1
D0
FREE_RU CKOUT_
N
ALWAYS_ON
BYPASS_REG
CK_PRIOR2[1:0]
CK_PRIOR1[1:0]
BWSEL_REG[3:0]
RATE_REG [3:0]
CKSEL_REG[1:0]
DHOLD
SQ_ICAL
AUTOSEL_REG[1:0]
HIST_DEL[4:0]
ICMOS[1:0]
SFOUT2_REG[2:0}
SFOUT1_REG[2:0]
FOSREFSEL[2:0]
HLOG_2[1:0]
HLOG_1[1:0]
HIST_AVG[4:0]
DSBL2_ REG DSBL1_ REG
PD_CK2
PD_CK1
FOS_EN
FOS_THR[1:0]
VALTIME[1:0]
LOCKT[2:0]
Write 0
Write 0
LOL_PIN
IRQ_PIN
Write 0
Write 0
CK1_ACT-
V_PIN
CKSEL_PIN
CK_ACTV_
POL
LOL_POL
INT_POL
LOS2_MSK LOS1_MSK LOSX_MSK
FOS2_MSK FOS1_MSK
LOL_MSK
N1_HS[2:0]
NC1_LS[19:16]
NC1_LS[15:8]
20
Rev. 1.1