SI5374 Datasheet, PDF (24/69 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5374
Register 2.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
BWSEL_REG [3:0]
RATE_REG[3:0]
Type
R/W
R/W
Reset value = 0100 0010
Bit
Name
Function
7:4 BWSEL_REG [3:0] BWSEL_REG.
Selects nominal f3dB bandwidth for PLL. See Si53xDSPLLsim for settings. After
BWSEL_REG is written with a new value, an ICAL is required for the change to
take effect.
3:0
RATE_REG [3:0] RATE Setting for Oscillator.
An external oscillator or other clock source must be used. It is not possible to
use just a crystal.
Setting
0101
0110
Others: Reserved
Minimum
37
109
Recommended
40
121.109
Maximum
41
125.5
Units
MHz
MHz
24
Rev. 1.1