|
SI5327 Datasheet, PDF (5/60 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR | |||
|
◁ |
Si5327
Table 2. DC Characteristics
(VDD = 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, TA = â40 to 85 °C)
Parameter
Supply Current1
Symbol
Test Condition
Min
Typ
IDD
LVPECL Format
â
251
622.08 MHz Out
Both CKOUTs Enabled
LVPECL Format
622.08 MHz Out
1 CKOUT Enabled
â
217
CMOS Format
â
204
19.44 MHz Out
Both CKOUTs Enabled
CMOS Format
19.44 MHz Out
1 CKOUT Enabled
â
194
Disable Mode
â
165
Max
Unit
279
mA
243
mA
234
mA
220
mA
â
mA
CKINn Input Pins2
Input Common Mode
Voltage (Input
Threshold Voltage)
VICM
1.8 V ± 5%
2.5 V ± 10%
0.9
â
1.4
V
1
â
1.7
V
3.3 V ± 10%
1.1
â
1.95
V
Input Resistance
CKNRIN
Single-ended
20
40
60
kï
Single-Ended Input
Voltage Swing
VISE
(See Absolute
Specs)
Differential Input
VID
Voltage Swing
(See Absolute
Specs)
fCKIN < 212.5 MHz
0.2
â
See Figure 1.
fCKIN > 212.5 MHz
0.25
â
See Figure 1.
fCKIN < 212.5 MHz
0.2
â
See Figure 1.
fCKIN > 212.5 MHz
0.25
â
See Figure 1.
â
VPP
â
VPP
â
VPP
â
VPP
Notes:
1. Current draw is independent of supply voltage.
2. No under- or overshoot is allowed.
3. LVPECL outputs require nominal VDD ⥠2.5 V.
4. This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx
Family Reference Manual for more details.
5. LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.
Rev. 1.0
5
|
▷ |