SI5327 Datasheet, PDF (14/60 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5327
Table 5. Jitter Generation
(V_DD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T_A = –40 to 85 ºC)
Parameter
Symbol
Test Condition^1,2,3,4
Min Typ Max GR-253-CORE Unit
Measuremen _{DSPLL BW}¹
t Filter (MHz)
Jitter Gen OC-48 J_GEN 0.012–20
111 Hz
— 0.5 0.6
4.02 ps_rms
(0.01 UI_rms)
ps_rms
Notes:
1. 40 MHz fundamental mode crystal used as XA/XB input.
2. V_DD = 2.5 V
3. T_A = 85 °C
4. Test condition: f_IN = 19.44 MHz, f_OUT = 156.25 MHz, LVPECL clock input: 1.19 Vppd with 0.5 ns rise/fall time (20–80%),
LVPECL clock output.
Table 6. Thermal Characteristics
(V_DD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Thermal Resistance Junction to Ambient
Symbol
_JA
Thermal Resistance Junction to Case
_JC
Test Condition
Still Air
Still Air
Value
32
14
Unit
C°/W
C°/W
14
Rev. 1.0