SI5327 Datasheet, PDF (46/60 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5327
Register 135.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
PARTNUM_RO [3:0]
REVID_RO [3:0]
Type
R
R
Reset value = 1011 0010
Bit
Name
7:4 PARTNUM_RO [11:0] Device ID (2 of 2).
0000 0001 1011: Si5327
3:0
REVID_RO [3:0] Device Revision.
0000: Revision A
0001: Revision B
0010: Revision C
Others: Reserved
Function
Register 136.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name RST_REG ICAL
Type
R/W
R/W
R
R
R
R
R
R
Reset value = 0000 0000
Bit
Name
Function
7
RST_REG Internal Reset (Same as Pin Reset).
Note: The I²C (or SPI) port may not be accessed until 10 ms after RST_REG is asserted.
0: Normal operation.
1: Reset of all internal logic. Outputs disabled or tristated during reset.
6
ICAL
Start an Internal Calibration Sequence.
For proper operation, the device must go through an internal calibration sequence. ICAL
is a self-clearing bit. Writing a “1” to this location initiates an ICAL. The calibration is com-
plete once the LOL alarm goes low.
0: Normal operation.
1: Writing a "1" initiates internal self-calibration. Upon completion of internal self-calibra-
tion, LOL will go low.
Notes:
1. A valid stable clock (within 100 ppm) must be present to begin ICAL.
2. If the input changes by more than 500 ppm, the part may do an autonomous ICAL.
3. See Table 9, “Register Locations Requiring ICAL,” on page 53 for register changes that
require an ICAL.
5:0
Reserved
46
Rev. 1.0