SI5327 Datasheet, PDF (26/60 Pages) Silicon Laboratories – ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5327
Register 6.
Bit
D7
D6
Name
Type
R
R
Reset value = 0010 1101
D5
D4
D3
SFOUT2_REG [2:0]
R/W
D2
D1
D0
SFOUT1_REG [2:0]
R/W
Bit
Name
Function
7:6
Reserved
5:3 SFOUT2_REG [2:0] SFOUT2_REG [2:0].
Controls output signal format and disable for CKOUT2 output buffer.
000: Reserved
001: Disable
010: CMOS (Bypass mode not supported)
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
Note: LVPECL requires a nominal V_DD  2.5 V.
2:0 SFOUT1_REG [2:0] SFOUT1_REG [2:0].
Controls output signal format and disable for CKOUT1 output buffer.
000: Reserved
001: Disable
010: CMOS (Bypass mode not supported)
011: Low swing LVDS
100: Reserved
101: LVPECL
110: CML
111: LVDS
Note: LVPECL requires a nominal V_DD  2.5 V.
26
Rev. 1.0