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S1003 Datasheet, PDF (32/42 Pages) Seiko Instruments Inc – MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
S-1003 Series
Rev.1.0_00
12. Delay time (tD) vs. Temperature (Ta)
S-1003NA12
CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V
12
11
10
9
8
−40 −25
0
25 50
Ta [°C]
75 85
S-1003NA50
CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V
12
11
10
9
8
−40 −25
0
25 50
Ta [°C]
75 85
S-1003NA24
CD = 4.7 nF, VDD = 0.95 V → −VDET(S) + 1.0 V
12
11
10
9
8
−40 −25
0
25 50
Ta [°C]
75 85
VIH*1
1 μs
Input voltage
VIL*2
tD
Output voltage
VDD × 90%
VSS
*1. VIH = −VDET(S) + 1.0 V
*2. VIL = 0.95 V
Figure 36 Test Condition for Delay Time
VDD
+
VDD
MR
OUT
V VSS CD
*2
CD
R*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
*2. Set to VDD or GND (MR pin non-active).
Figure 37 Test Circuit for Delay Time
Caution The above connection diagram and constant will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constant.
32
Seiko Instruments Inc.