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S1003 Datasheet, PDF (18/42 Pages) Seiko Instruments Inc – MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
S-1003 Series
Rev.1.0_00
2. 3 Cautions of manual reset function
2. 3. 1 Slew rate when switching manual reset function
Although there is a hysteresis width between the MR pin input voltage "L" (VMRL) and the MR pin input voltage "H"
(VMRH), note that the IC may malfunction if the slew rate (Refer to Figure 22, Figure 23) is low when the MR pin
voltage is changed.
The slew rate is calculated by using the following equation.
Slew rate =
VMRH − VMRL
Δt
(1) When MR pin logic is active "L"
The OUT pin voltage may oscillate if the parasitic resistance (RP) between the power supply and the VDD pin is
high.
・In case of RP ≥ 8 kΩ:
Connect a capacitor of 1 nF or more between the VDD pin and the VSS pin.
・In case of 5 kΩ ≤ RP < 8 kΩ: Capacitors are unnecessary if the slew rate is 100 V/s or higher.
・In case of RP < 5 kΩ:
Capacitors are unnecessary if the slew rate is 1 V/s or higher.
VMR
VMRH
VMRL
Time
Δt
Figure 22
(2) When MR pin logic is active "H"
Connect a capacitor of 100 pF or more to the CD pin, and set the slew rate 20 V/s or higher.
VMR
VMRH
VMRL
Δt
Figure 23
Time
18
Seiko Instruments Inc.