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S1003 Datasheet, PDF (23/42 Pages) Seiko Instruments Inc – MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING)
MANUAL RESET BUILT-IN DELAY CIRCUIT (EXTERNAL DELAY TIME SETTING) HIGH-ACCURACY VOLTAGE DETECTOR
Rev.1.0_00
S-1003 Series
„ Explanation of Terms
1. Detection voltage (−VDET)
The detection voltage is a voltage at which the output in Figure 30 turns to "L". The detection voltage varies slightly
among products of the same specification. The variation of detection voltage between the specified minimum
(−VDET min.) and the maximum (−VDET max.) is called the detection voltage range (Refer to Figure 28).
Example: In the S-1003Cx15, the detection voltage is either one in the range of 1.478 V ≤ −VDET ≤ 1.522 V.
This means that some S-1003Cx15 have −VDET = 1.478 V and some have −VDET = 1.522 V.
2. Release voltage (+VDET)
The release voltage is a voltage at which the output in Figure 30 turns to "H". The release voltage varies slightly
among products of the same specification. The variation of release voltage between the specified minimum (+VDET
min.) and the maximum (+VDET max.) is called the release voltage range (Refer to Figure 29). The range is
calculated from the actual detection voltage (−VDET) of a product and is in the range of −VDET × 1.03 ≤ +VDET ≤ −VDET
× 1.07.
Example: For the S-1003Cx15, the release voltage is either one in the range of 1.522 V ≤ +VDET ≤ 1.629 V.
This means that some S-1003Cx15 have +VDET = 1.522 V and some have +VDET = 1.629 V.
VDD
−VDET max.
−VDET min.
Detection voltage
Detection voltage
range
Release voltage
+VDET max.
+VDET min.
VDD
Release voltage
range
OUT
Figure 28 Detection Voltage
OUT
tD
Figure 29 Release Voltage
VDD
VDD
+
V
MR OUT
VSS
*2
CD
R*1
100 kΩ
+
V
*1. R is unnecessary for CMOS output product.
*2. Set to VDD or GND (MR pin non-active).
Figure 30 Test Circuit of Detection Voltage and Release Voltage
Seiko Instruments Inc.
23