M166 Datasheet, PDF (69/127 Pages) Siemens Semiconductor Group – C16x Family of Siemens 16-Bit CMOS Single-Chip Microcontrollers

30Mar98@15:00h
C166 Family Instruction Set
Instruction Description
EXTP
Begin EXTended Page Sequence
EXTP
Syntax
Operation
Description
Note
EXTP
op1, op2
(count) ← (op2) [1 ≤ op2 ≤ 4]
Disable interrupts and Class A traps
Data_Page = (op1)
DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE)
Next Instruction
(count) ← (count) - 1
END WHILE
(count) = 0
Data_Page = (DPPx)
Enable interrupts and traps
Overrides the standard DPP addressing scheme of the long and indirect
addressing modes for a specified number of instructions. During their exe-
cution, both standard and PEC interrupts and class A hardware traps are
locked. The EXTP instruction becomes immediately active such that no
additional NOPs are required.
For any long (’mem’) or indirect ([...]) address in the EXTP instruction
sequence, the 10-bit page number (address bits A23-A14) is not deter-
mined by the contents of a DPP register but by the value of op1 itself. The
14-bit page offset (address bits A13-A0) is derived from the long or indi-
rect address as usual.
The value of op2 defines the length of the effected instruction sequence.
The EXTP instruction must be used carefully (see introductory note).
The EXTP instruction is not available in the SAB 8XC166(W) devices.
Condition Flags
E
Z
V
C
N
-
-
-
-
-
Addressing Modes
E Not affected.
Z Not affected.
V Not affected.
C Not affected.
N Not affected.
Mnemonic
EXTP
Rwm, #irang2
EXTP
#pag, #irang2
Format
DC :01##-m
D7 :01##-0 pp 0:00pp
Bytes
2
4
Semiconductor Group
69
Version 1.2, 12.97