M166 Datasheet, PDF (123/127 Pages) Siemens Semiconductor Group – C16x Family of Siemens 16-Bit CMOS Single-Chip Microcontrollers

30Mar98@15:00h
C166 Family Instruction Set
Instruction State Times
7 Instruction State Times
Basically, the time to execute an instruction depends on where the instruction is fetched from, and
where possible operands are read from or written to. The fastest processing mode is to execute a
program fetched from the internal ROM. In that case most of the instructions can be processed
within just one machine cycle, which is also the general minimum execution time.
All external memory accesses are performed by the on-chip External Bus Controller (EBC), which
works in parallel with the CPU. Mostly, instructions from external memory cannot be processed as
fast as instructions from the internal ROM, because some data transfers, which internally can be
performed in parallel, have to be performed sequentially via the external interface. In contrast to
internal ROM program execution, the time required to process an external program additionally
depends on the length of the instructions and operands, on the selected bus mode, and on the
duration of an external memory cycle, which is partly selectable by the user.
Processing a program from the internal RAM space is not as fast as execution from the internal
ROM area, but it offers a lot of flexibility (ie. for loading temporary programs into the internal RAM
via the chip’s serial interface, or end-of-line programming via the bootstrap loader).
The following description allows evaluating the minimum and maximum program execution times.
This will be sufficient for most requirements. For an exact determination of the instructions’ state
times it is recommended to use the facilities provided by simulators or emulators.
This section defines the subsequently used time units, summarizes the minimum (standard) state
times of the 16-bit microcontroller instructions, and describes the exceptions from that standard
timing.
Time Unit Definitions
The following time units are used to describe the instructions’ processing times:
[f_CPU]: CPU operating frequency (may vary from 1 MHz to 20 MHz).
[State]: One state time is specified by one CPU clock period. Henceforth, one State is used as
the basic time unit, because it represents the shortest period of time which has to be considered
for instruction timing evaluations.
1 [State] = 1/f_CPU [s] ; for f_CPU = variable
= 50
[ns] ; for f_CPU = 20 MHz
[ACT]: This ALE (Address Latch Enable) Cycle Time specifies the time required to perform
one external memory access. One ALE Cycle Time consists of either two (for demultiplexed exter-
nal bus modes) or three (for multiplexed external bus modes) state times plus a number of state
times, which is determined by the number of waitstates programmed in the MCTC (Memory Cycle
Time Control) and MTTC (Memory Tristate Time Control) bit fields of the SYSCON/BUSCONx reg-
isters.
In case of demultiplexed external bus modes:
1_*ACT = (2 + (15 – MCTC) + (1 – MTTC)) _* States
= 100 ns ... 900 ns ; for f_CPU = 20 MHz
In case of multiplexed external bus modes:
1_*ACT = 3 + (15 – MCTC) + (1 – MTTC) _* States
= 150 ns ... 950 ns ; for f_CPU = 20 MHz
Semiconductor Group
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Version 1.2, 12.97