M166 Datasheet, PDF (126/127 Pages) Siemens Semiconductor Group – C16x Family of Siemens 16-Bit CMOS Single-Chip Microcontrollers

30Mar98@15:00h
C166 Family Instruction Set
Instruction State Times
• Internal SFR operand reads: T_Iadd = 0, 1 _* State or 2 _* States
Mostly, SFR read accesses do NOT require additional processing time. In some rare cases,
however, either one or two additional state times will be caused by particular SFR operations, as
follows:
– Reading an SFR immediately after an instruction, which writes to the internal SFR space, as
shown in the following example:
In
: MOV T0, #1000h
; write to Timer 0
In+1
: ADD R3, T1
; read from Timer 1: TIadd = 1 _* State
– Reading the PSW register immediately after an instruction, which implicitly updates the condition
flags, as shown in the following example:
In
: ADD R0, #1000h
; implicit modification of PSW flags
In+1
: BAND C, Z
; read from PSW: TIadd = 2 _* States
– Implicitly incrementing or decrementing the SP register immediately after an instruction, which
explicitly writes to the SP register, as shown in the following example:
In
: MOV SP, #0FB00h ; explicit update of the stack pointer
In+1
: SCXT R1, #1000h
; implicit decrement of the stack pointer:
: TIadd = 2 _* States
In these cases, the extra state times can be avoided by putting other suitable instructions before the
instruction I_n+1 reading the SFR.
• External operand reads: T_Iadd = 1 _* ACT
Any external operand reading via a 16-bit wide data bus requires one additional ALE Cycle Time.
Reading word operands via an 8-bit wide data bus takes twice as much time (2 ALE Cycle Times)
as the reading of byte operands.
• External operand writes: T_Iadd = 0 _* State ... 1 _* ACT
Writing an external operand via a 16-bit wide data bus takes one additional ALE Cycle Time. For
timing calculations of external program parts, this extra time must always be considered. The value
of T_Iadd which must be considered for timing evaluations of internal program parts, may fluctuate
between 0 state times and 1 ALE Cycle Time. This is because external writes are normally
performed in parallel to other CPU operations. Thus, T_Iadd could already have been considered in
the standard processing time of another instruction. Writing a word operand via an 8-bit wide data
bus requires twice as much time (2 ALE Cycle Times) as the writing of a byte operand.
Semiconductor Group
126
Version 1.2, 12.97