M166 Datasheet, PDF (119/127 Pages) Siemens Semiconductor Group – C16x Family of Siemens 16-Bit CMOS Single-Chip Microcontrollers

30Mar98@15:00h
C166 Family Instruction Set
Addressing Modes
DPP Override Mechansim in the C167/5
Other than the older devices from the SAB 80C166 group the C167 and C165 devices provide an
override mechanism that allows to bypass the DPP addressing scheme temporarily.
The EXTP(R) and EXTS(R) instructions override this addressing mechanism. Instruction EXTP(R)
replaces the content of the respective DPP register, while instruction EXTS(R) concatenates th
complete 16-bit long address with the specified segment base address. The overriding page or
segment may be specified directly as a constant (#pag, #seg) or via a word GPR (Rw).
EXTP(R):
15 14 13
16-bit Long Address
#pag
0
14-bit page offset
24-bit Physical Address
EXTS(R):
15
16-bit Long Address
#seg
0
16-bit segment offset
24-bit Physical Address
Figure 6-2: Overriding the DPP Mechanism
Indirect Addressing Modes
These addressing modes can be regarded as a combination of short and long addressing modes.
This means that long 16-bit addresses are specified indirectly by the contents of a word GPR, which
is specified directly by a short 4-bit address (’Rw’=0 to 15). There are indirect addressing modes,
which add a constant value to the GPR contents before the long 16-bit address is calculated. Other
indirect addressing modes allow decrementing or incrementing the indirect address pointers (GPR
content) by 2 or 1 (referring to words or bytes).
In each case, one of the four DPP registers is used to specify physical 18-bit or 24-bit addresses.
Any word or byte data within the entire memory space can be addressed indirectly.
Note: The exceptions for instructions EXTP(R) and EXTS(R), ie. overriding the DPP mechanism,
apply in the same way as described for the long addressing modes.
Some instructions only use the lowest four word GPRs (R3...R0) as indirect address pointers, which
are specified via short 2-bit addresses in that case.
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