SM8521 Datasheet, PDF (46/56 Pages) Sharp Electrionic Components – 8-Bit Single-Chip Microcomputer

000000H
SM8521
0000H
0400H
1000H
2000H
4000H
6000H
8000H
A000H
E000H
FFFFH
Internal I/O / RAM
4 k-byte
8 k-byte
8 k-byte
8 k-byte
8 k-byte
∗NOTES
External
ROM/Flash
External
ROM/Flash
External
ROM/Flash
External
ROM/Flash
VRAM
Extend I/O
Extend RAM
ROM/Flash
1FFFFFH
Fig. 23 MMU Mapping
NOTES :
• At reset, MMU0 is disable and internal ROM is enable.
(1000H-1FFFH). At setting data into MMU0 once, internal
ROM becomes disable and MMU0 becomes enable.
• In case of changing to external ROM mode by putting
some data into MMU register, use Immediate R in "MOV"
instruction (MOV R, r or MOV R, R). Data in the next
internal ROM address will be fetched at the same time of
executing the instruction. Only one byte instruction can be
followed when setting data to MMU0 register.
0000H
0400H
1000H
2000H
4000H
6000H
8000H
A000H
E000H
FFFFH
Internal I/O / RAM
4 k-byte
8 k-byte
Internal ROM
External
ROM/Flash
8 k-byte
External
ROM/Flash
8 k-byte
External
ROM/Flash
8 k-byte
External
ROM/Flash
VRAM
Extend I/O
Extend RAM
In case of MMU0 is disable
(At reset)
0000H
0400H
1000H
2000H
4000H
6000H
8000H
A000H
E000H
FFFFH
Internal I/O / RAM
4 k-byte
8 k-byte
8 k-byte
External ROM/Flash
External
ROM/Flash
External
ROM/Flash
8 k-byte
External
ROM/Flash
8 k-byte
External
ROM/Flash
VRAM
Extend I/O
Extend RAM
In case of MMU0 is enable
Fig. 24 Comparison Figure MMU 0 between Disable and Enable
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