K4F661612B Datasheet, PDF (9/35 Pages) Samsung semiconductor – 4M x 16bit CMOS Dynamic RAM with Fast Page Mode

K4F661612B,K4F641612B
CMOS DRAM
13. tASC, tCAH are referenced to the earlier CAS falling edge.
14. tCP is specified from the later CAS rising edge in the previous cycle to the earlier CAS falling edge in the next cycle.
15. tCWD is referenced to the later CAS falling edge at word read-modify-write cycle.
16. tCWL is specified from W falling edge to the earlier CAS rising edge.
17. tCSR is referenced to the earlier CAS falling edge before RAS transition low.
18. tCHR is referenced to the later CAS rising edge after RAS transition low.
RAS
LCAS
UCAS
tCSR
tCHR
19. tDS is specified for the earlier CAS falling edge and tDH is specified by the later CAS falling edge.
LCAS
UCAS
DQ0 ~ DQ15
tDS
tDH
Din
20. If tRASS≥100us, then RAS precharge time must use tRPS instead of tRP.
21. For RAS-only refresh and burst CAS-before-RAS refresh mode, 4096(4K/8K) cycles of burst refresh must be executed within
64ms before and after self refresh, in order to meet refresh specification.
22. For distributed CAS-before-RAS with 15.6us interval CAS-before-RAS should be executed with in 15.6us immediately before
and after self refresh in order to meet refresh specification.